Currency detectors



Dec. 14, 1965 D. M. DANKO CURRENCY DETECTORS Filed June 10, 1960 IN V ENTOR.

BY DONALD M. DANKO ATTORNEY tion, provides high gain, and has a lownoise level.

United States Patent 3,223,988 CURRENCY DETECTORS Donald M. Danko,Parma, Ohio, assignor to National 131ejectors, Inc., St. Louis, Mo., acorporation of Missouri Filed June 10, 196i Ser. No. 35,355 2 Ciaims.(Cl. 340174.1)

This invention relates to improvements in currency detectors. Moreparticularly, this invention relates to improvements in methods andapparatus for identifying authentic paper currency.

It is, therefore, an object of the present invention to provide animproved method and apparatus for identifying authentic paper currency.

Co-pending patent application Serial Number 849,066, now abandoned, forCurrency Detectors, which was filed on October 27, 1959, by Theodore H.Smith, Sigmund Kramer and myself, discloses the movement of papercurrency past a magnetic head at a predetermined rate of speed to enableauthentic paper currency, that is printed with ink having magneticproperties, to generate voltage variations that cause the acceptance ofsuch currency. That application discloses an electronic circuit whichincludes a pre-amplifier; and that pre-amplifier is well adapted for usewith currency detectors that accept paper currency of a predetermineddenomination. It is becoming progressively important to be able todetect paper bills of different denominations; and hence it would bedesirable to provide a pre-amplifier that is well adapted for use withcurrency detectors that accept paper bills of different denominations.The present invention provides such a pre-amplifier; and it is thereforean object of the present invention to provide a pre-amplifier that iswell adapted for use with currency detectors that accept paper bills ofdifferent denominations.

The pre-amplifier provided by the present invention coacts with themagnetic head of the currency detector to constitute a high passamplifier that can provide a substantially flat frequency responsethroughout the range of frequencies generated by the paper bills ofdifferent denominations which are to be accepted by the currencydetector. Further, that pre-amplifier is stable in opera- It is,therefore, an object of the present invention to provide a pre-amplifierthat is stable in operation, that provides high gain, that has a lownoise level, and that combines with the magnetic head of a currencydetector to constitute a high pass amplifier that can provide asubstantially flat frequency response throughout the range offrequencies generated by the paper bills of different denominationswhich are to be accepted by the currency detector.

The pre-amplifier of the present invention uses capacitance andresistance to couple voltage variations, generated in the coils of themagnetic head, to the first stage of pre-amplification; and it uses acapacitance value which coacts with the overall inductance value ofthose coils to produce resonance at a frequency close to the lower endof the desired frequency range. In doing so, that pre-amplifier coactswith the magnetic head to provide the needed high gain at the lower endof the desired frequency range. That pre-amplifier uses transistorsrather than thermionic tubes; and it uses transistors which have betacut'ofi' characteristics in the intermediate range. Those beta cut-offcharacteristics coact with the distributed capacities in the magnetichead to permit the attainment of a desirable gain in the intermediateportions of the desired frequency range but coact with those distributedcapacities to provide a desirable limitation on the gain at the upperend of the desired frequency range; and, in doing so, those beta cut-offcharacteristics coact with those distributed capacities to tend tomaintain the gain at those intermediate and higher frequencies at valuescomparable to the gain values at the lower end of the desired frequencyrange. In this way, the pre-amplifier of the present invention coactswith the magnetic head of a currency detector to help produce asubstantially flat frequency response throughout the desired frequencyrange.

The interaction of the inductance of the magnetic head with thecapacitance of the resistance-capacitance coupling between that magnetichead and the first transistor stage is additionally desirable because itincreases the rate of rejection at the low end of the desired frequencyrange. That increased rate of rejection is important in reducing allundesired low frequency modulation, whether that modulation be due tohum, noise, or transients. In this Way, the pie-amplifier provided bythe present invention coacts with the magnetic head of a currencydetector to minimize low frequency modulation.

The capacitor of the resistance-capacitance coupling, which thepre-amplifier of the present invention uses to couple the magnetic headto the first transistor stage, coacts with the coils of that magnetichead to constitute a tuned circuit. Theoretically it would seemdesirable to make the input impedance of that transistor stagesubstantially equal to the impedance of that tuned circuit, because theresultant impedance matching would provide maximum gain. The presentinvention does not, however, make the input impedance of the firsttransistor stage substantially equal to the impedance of that tunedcircuit; instead, the present invention makes the input impedance ofthat transistor stage very much smaller than the impedance of that tunedcircuit. In doing so, the present invention reduces the overall Q of thecombination of magnetic head and pre-amplifier, and thereby preventssharp peaking in the desired frequency range. It is, therefore, anobject of the present invention to provide a pre-amplifier which has acoupling capacitor that coacts with the coils of a magnetic head toconstitute a tuned circuit and which makes the input impedance of thefirst transistor stage very much smaller than the impedance of thattuned circuit.

The low input impedance of the first transistor stage is additionallydesirable because it minimizes the effects which noise and othertransients can have. Noise and other transients can coact with a highinput impedance to produce voltage variations from which thepre-amplifier could not quickly recover, and this is undesirable. Byusing a low input impedance for the first transistor stage and by alsousing a low input impedance for the second transistor stage, the presentinvention limits the voltage variations which can be produced by noiseand other transients to low values that are not troublesome.

The low input impedances of the transistor stages will coact with thebeta cut-off characteristics of the transistors of those stages and withthe distributed capacities of the magnetic head to increase the rate ofrejection at frequencies above the upper end of the desired frequencyrange. That increased rate of rejection is important in reducing highfrequency modulation, whether that modulation be due to harmonics,noise, or transients. In this way, the pre-amplifier provided by thepresent invention coacts with the magnetic head of a currency detectorto minimize undesired high frequency modulation.

Other and further objects and advantages of the present invention shouldbecome apparent from an examination of the drawing and accompanyingdescription.

In the drawing and accompanying description, a preferred embodiment ofthe present invention is shown and described but it is to be understoodthat the drawing and accompanying description are for the purpose ofillustraand grounded terminal 24.

tion only and do not limit the invention and that the invention will bedefined by the appended claims.

The drawing consists of a schematic diagram of the pre-amplifier of thepresent invention combined with the magnetic head of a currencydetector.

Referring to the drawing in detail, the numeral 20 denotes a magnetichead which has a low inductance; and, in one preferred embodiment of thepresent invention, that inductance is eight hundred and seventymillihenries. The coils on the magnetic head 20 are connected in series,and they are connected to the input terminals 8 of the preamplifierprovided by the present invention.

One end of a resistor 10 is connected to the upper of the terminals 8,and the other end of that resistor is connected to a positive voltagesupply terminal 14 by a resistor 16. The other terminal 8 is connectedto a negative Current will flow through the resistors 16 and 10 andthrough the coils of the magnetic head 20 to provide the biasing currentneeded by that head. A capacitor 12 is connected to the groundedterminal 24 and to the junction of resistors 10 and 16; and thatcapacitor coacts with the resistor 16 to provide de-coupling.

The numeral 18 denotes a coupling capacitor that is connected betweenthe upper terminal 8 and the base of a transistor 22. The collector ofthe transistor 22 is connected to the grounded terminal 24 byserially-connected resistors 34 and 36. The junction of those tworesistors is connected to the base of the transistor 22 by a resistor32. The base is also connected to the positive terminal 14 by a resistor28, a resistor 38, and a resistor 40. The emitter of the transistor 22is connected to the terminal 14 by a resistor 42 and theserially-connected resistors 38 and 40. A by-pass capacitor 44 isprovided for the resistor 42.

A coupling capacitor 26 extends between the collector of the transistor22 and the base of a transistor 30. The collector of the transistor 30is connected to the terminal 24 by serially-connected resistors 46 and48. The junction of those resistors is connected to the base of thetransistor 30 by a resistor 50. That base is also connected to theterminal 14 by a resistor 52 and by resistor 40. The emitter of thetransistor 30 is connected to the terminal 14 by a resistor 54 and byresistor 40. A by-pass capacitor 56 is provided for the resistor 54.

A resistor 58 is connected intermediate the resistor 38 and the groundedterminal 24. A by-pass capacitor 60 is provided for the resistor 58. Aby-pass capacitor 62 is connected between the grounded terminal 24 andthe junction of resistors 38 and 40.

A coupling capacitor 64 is connected between the collector of thetransistor 30 and terminal 66, which constitutes one of the outputterminals of the pre-amplifier. The terminal 24 serves as the otheroutput terminal of the pre-amplifier. The terminals 66 and 24 of thepreamplifier will be suitably connected to the input of the next sectionof the electronic circuit of the currency detector.

The resistors 40, 38 and 58 constitute a voltage-dividing network; andthat network provides a positive voltage at the upper'end of theresistor 54 which is materially smaller than the positive voltage at theterminal 14. That network also provides a positive voltage at the upperend of the resistor 42 which is smaller than the voltage at the upperend of the resistor 54. In the said preferred embodiment of the presentinvention, the voltage at the terminal 14 is one hundred and eightvolts, the voltage at the upper end of the resistor 54 is twenty volts,and the voltage at the upper end of the resistor 42 is five volts.

The resistors 28, 32 and 36 constitute a further voltagedividingnetwork; and that network establishes the voltage for the base of thetransistor 22. The resistor 32 extends between the base of transistor 22and the junction of collector resistors 34 and 36, and it feeds back tothat base a degenerative direct current and thereby stabilizes the firststage of the pre-amplifier with respect to ambient temperatureconditions. Specifically, as the temperature of the transistor 22increases, the current gain of that transistor will increase; but thatcurrent gain will be limited by the said degenerative direct current.

The resistors 52, 50 and 48 constitute yet another voltage-dividingnetwork, and that network establishes the voltage for the base of thetransistor 30. The resistor 50 extends between the base of transistor 30and the junction of collector resistors 46 and 48, and it feeds back tothat base a degenerative direct current and thereby stabilizes thesecond stage of the pro-amplifier with respect to ambient temperatureconditions.

The voltage variations that are generated in the coils of the magnetichead, as authentic paper bills that are printed with ink having magneticproperties are moved past that head, are coupled to the base of thetransistor 22 by capacitor 18; and hence that capacitor performs acoupling function. That capacitor also performs another function,because it coacts with the inductance of the coils of that magnetic headto constitute a series resonant circuit. In the said preferredembodiment of the present invention, the capacitor 18 has a value ofonetenth of a microfarad; and hence the resonant frequency of thatseries resonant circuit will be between five hundred and six hundredcycles per second. This is desirable because it provides a desirablegain at frequencies close to the lower end of the range of frequenciesgenerated by the paper bills of different denominations which are to beaccepted by the currency detector.

The interaction of the inductance of the coils of the magnetic head 20with the capacitance of the capacitor 18 is also important because itincreases the rate of rejection at the low end of the desired frequencyrange. In the said one preferred embodiment of the present invention,that interaction provided a rate of rejection of at least sixteendecibels per octave at the lower end of the desired frequency range. Indoing so, that interaction greatly minimized low frequency modulation ofthe voltage variations from the magnetic head, whether that modulationwas due to hum, noise or transients.

In the said preferred embodiment of the present invention, thetransistors 22 and 30 are 2Nl374 PNP germanium transistors; and hencethey have beta cut-off characteristics in the intermediate range of fromtwentyfive kilocycles to one megacycle. Such beta cut-offcharacteristics coact with the distributed capacities in the magnetichead 20 to assure the attainment of a desirable gain in the intermediateportions of the desired frequency range but coact with those distributedcapacities to provide a desirable limitation on the gain at the upperend of the desired frequency range. In this way, the preamplifier of thepresent invention coacts with the magnetic head of the currency detectorto help produce a substantially flat frequency response throughout thedesired frequency range.

The impedance of the series resonant circuit constituted by capacitor 18and by the coils of magnetic head 20 is high; but the input impedance ofthe first transistor stage of the pre-amplifier in the said preferredembodiment of the present invention is lowbeing about twenty two hundredohms at a thousand cycles per second. This means that the overall Q ofthe combination of magnetic head and pre-arnplifier is very much lessthan it would be if the input impedance of the first transistor stagewas substantially equal to the impedance of the series resonant circuit.That reduced Q is important in preventing sharp peaking in the desiredfrequency range.

The second transistor stage has a low input impedance comparable to thatof the first transistor stage. As a result, noise and other transientscannot produce voltage variations from which the pre-amplifier could notquickly recover. Consequently, the pre-amplifier provided by the presentinvention is stable in operation and has a low noise level.

The low voltage for the first transistor stage, namely, five volts atthe upper end of the resistor 42 is desirable because it enables thatstage to operate in a quiet condition. The higher voltage for the secondtransistor stage, namely, twenty volts at the upper end of resistor 54,is desirable because it enables that stage to drive the subsequentsection of the electronic circuit sufficiently to avoid clipping of thedesired voltage variations.

The low input impedances of the two transistor stages coact with thebeta cut-off characteristics of the transistors 22 and 30 and with thedistributed capacities of the magnetic head 20 to increase the rate ofrejection at frequencies above the upper end of the desired frequencyrange. That increased rate of rejection is important in reducing thehigh frequency modulation of the voltage variations from the magnetichead 20, whether that modulation is due to harmonics, noise ortransients. In this way, the pre-amplifier provided by the presentinvention coacts with the magnetic head of the currency detector tominimize undesired high frequency modulation.

Whereas the drawing and accompanying description have shown anddescribed one preferred embodiment of the present invention it should beapparent to those skilled in the art that various changes may be made inthe form of the invention without affecting the scope thereof.

What I claim is:

1. In a currency detector, the combination of a magnetic head thatengages a bill to generate voltage variations and that has a lowinductance, a resistance-capacitance network that couples said magnetichead to a transistor stage of a pre-amplifier, the capacitor of saidresistance-capacitance network being connected in series relation withthe coil of said magnetic head to constitute a series resonant circuit,and a second resistance-capacitance network that couples said transistorstage to a sec ond transistor stage of said pre-arnplifier, thecapacitor of the first said resistance-capacitance network having acapacitance that coacts with the inductance of the coil of said magnetichead to make said capacitor and said coil constitute a series resonantcircuit that resonates at a frequency below but adjacent the lower endof a desired frequency range, said series resonant circuit providing ahigh gain for frequencies below but adjacent said lower end of saiddesired frequency range, said resistancecapacitance networks passingsignals within said desired frequency range but said series resonantcircuit providing a high rate of rejection below the resonant frequencythereof and thus below said lower end of said desired frequency rangeand thereby minimizing low frequency modulation of voltage variationsgenerated in said coil of said magnetic head as a bill engages and movesrelative to said magnetic head, the first said transistor stage havingan input impedance that is very much smaller than the impedance of saidseries resonant circuit to reduce the Q of the combination of saidmagnetic head and preamplifier, thereby preventing sharp peaking in saiddesired frequency range, said second transistor stage having a low inputimpedance that coacts with said low input impedance of the first saidtransistor stage to reduce the effect which noise and other transientscan have upon the voltage variations generated in said coil of saidmagnetic head, the transistor of the first said transistor stage and thetransistor of said second transistor stage coacting with the distributedcapacities of said magnetic head to permit the attainment of desiredgain at frequencies above said lower end of said desired frequency rangeand to limit the gain at frequencies adjacent the upper end of saiddesired frequency range, said series resonant circuit coacting with saidtransistors to provide a substantially flat frequency responsethroughout said desired frequency range, said transistors coacting withsaid distributed capacities and with said low input impedances of saidtransistor stages to increase the rate of rejection at frequencies abovesaid desired frequency range, said capacitor of the first saidresistance-capacitance network coacting with the first said transistorstage to constitute a high pass amplifier, the capacitor of said secondresistance-capacitance network coacting with said second transistorstage to constitute a second high pass amplifier.

2. In a currency detector, the combination of a magnetic head thatengages a bill to generate voltage variations and aresistance-capacitance network that couples said magnetic head to atransistor stage of an amplifier, the capacitor of saidresistance-capacitance network being connected in series relation withthe coil of said magnetic head to constitute a series resonant circuit,the capacitor of said resistance-capacitance network having acapacitance that coacts with the inductance of the coil of said magnetichead to make said capacitor and said coil constitute a series resonantcircuit that resonates at a frequency below but adjacent the lower endof a desired frequency range, said series resonant circuit providing ahigh gain for frequencies below but adjacent said lower end of saiddesired frequency range, said resistancecapacitance network passingsignals within said desired frequency range but said series resonantcircuit providing a high rate of rejection below the resonant frequencythereof and thus below said lower end of said desired frequency rangeand thereby minimizing low frequency modulation of voltage variationsgenerated in said coil of said magnetic head, said transistor having aninput impedance that is very much smaller than the impedance of saidseries resonant circuit to reduce the Q .of the combination of saidmagnetic head and said amplifier, thereby preventing sharp peaking insaid desired frequency range.

References Cited by the Examiner UNITED STATES PATENTS 2,213,246 9/1940Heller 179-lO0.2 2,806,181 9/1957 Rockafellow 32441 2,861,258 11/1958Walsh et al. 340174.1 2,924,812 2/1960 Merritt 340-149 3,026,380 3/1962Reher et a1. 179100.2 3,068,327 12/1962 Davidson 179-100.2

IRVING L. SRAGOW, Primary Examiner.

EVERETT R. REYNOLDS, Examiner.

1. IN A CURRENCY DETECTOR, THE COMBINATION OF A MAGNETIC HEAD THATENGAGES A BILL T GENERATE VOLTAGE VARITIONS AND THAT HAS A LOWINDUCTANCE, A RESISTANCE-CAPACITANCE NETWORK THAT COUPLES SAID MAGNETICHEAD TO A TRANSISTOR STAGE OF A PRE-AMPLIFIER, THE CAPACITOR OF SAIDRESISTANCE-CAPACITANCE NETWORK BEING CONNECTED IN SERIES RELATION WITHTHE COIL OF SAID MAGNETIC HEAD TO CONSTITUTE A SERIES RESONANT CIRCUIT,AND A SECOND RESISTANCE-CAPACITANCE NETWORK THAT COUPLES SAID TRANSISTORSTAGE TO A SECOND TRANSISTOR STAGE OF SAID PRE-AMPLIFIER, THE CAPACITOROF THE FIRST SAID RESISTANCE-CAPACITANCE NETWORK HAVING A CAPACITANCETHAT COACTS WITH THE INDUCATANCE OF THE COIL OF SAID MAGNETIC HEAD TOMAKE SAID CAPACITOR AND THE COIL OF CONSTITUTE A SERIES RESONSTANTCIRCUIT THAT RESONATES AT A FREQUENCY BELOW BUT ADJACENT THE LOWER ENDOF A DESIRED FREQUENCY RANGE, SAID SERIES RESONANT CIRCUIT PROVIDING AHIGH GAIN FOR FREQUENCIES BELOW BUT ADJACENT SAID LOWER END OF SAIDDESIRED FREQUENCY RANGE, SAID RESISTANCECAPACITANCE NETWORKS PASSINGSIGNALS WITHIN SAID DESIRED FREQUENCY RANGE BUT SAID SERIES RESONANTCIRCUIT PROVIDING A HIGH RATE OF REJECTION BELOW THE RESONANT FREQUENCYTHEREOF AND THUS BELOW SAID LOWER END OF SAID DESIRED FREQUENCY RANGEAND THEREBY MINIMIZING LOW FREQUENCY MODULATION OF VOLTAGE VARIATIONSGENERATED IN SAID COIL OF SAID MAGNETIC HEAD AS A BILL ENGAGES AND MOVESRELATIVE TO SAID MAGNETIC HEAD, THE FIRST SAID TRANSISTOR STAGE HAVINGAN INPUT IMPEDANCE THAT IS VERY MUCH SMALLER THAN THE IMPEDANCE OF SAIDSERIES RESONSANT CIRCUIT TO REDUCE THE Q OF THE COMBINATION OF SAIDMAGNETIC HEAD AND PREAMPLIFIER, THEREBY PREVENTING SHARP PEAKING IN SAIDDESIRED FREQUENCY RANGE, SAID SECOND TRANSISTOR STAGE HAVING A LOW INPUTIMPEDANCE THAT COACTS WITH SAID LOW INPUT IMPEDANCE OF THE FIRST SAIDTRANSISTOR STAGE TO REDUCE THE EFFECT WHICH NOISE AND OTHER TRANSIENTSCAN HAVE UPON THE VOLTAGE VARIATIONS GENERATED IN SAID COIL OF SAIDMAGNETIC HEAD, THE TRANSISTOR OF THE FIRST SAID TRANSISTOR STAGE AND THETRANSISTOR OF SAID SECOND TRANSISTOR STAGE COACTING WITH THE DISTRIBUTEDCAPACITIES OF SAID MAGNETIC HEAD TO PERMIT THE ATTAINMENT OF DESIREDFREQUENCIES ABOVE SAID LOWER END OF SAID DESIRED FREQUENCY RANGE AND TOLIMIT THE GAIN AT FREQUENCIES ADJACENT THE UPPER END SAID DESIREDFREQUENCY RANGE, SAID SERIES RESONANT CIRCUIT COACTING WITH SAIDTRANSISTORS TO PROVIDE A SUBSTANTIALLY FLAT FREQUENCY RESPONSE THROUGOUTSAID DESIRED FREQUENCY RANGE, SAID TRANSISTORS COACTING WITH SAIDDISTRIBUTED CAPACITIES AND WITH SAID LOW INPUT IMPEDANCES OF SAIDTRANSISTOR STAGES TO INCREASE THE RATE OF REJECTION AT FREQUENCIES ABOVESAID DESIRED FREQUENCY RANGE, SAID CAPACITOR OF THE FIRST SAIDRESISTANCE-CAPACITANCE NETWORK COACTING WITH THE FIRST SAID TRANSISTORSTAGE TO CONSTITUTE A HIGH PASS AMPLIFIER, THE CAPACITOR OF SAID SECONDRESISTANCE-CAPACITANCE NETWORK COACTING WITH SAID SECOND TRANSISTORSTAGE TO CONSTITUTE A SECOND HIGH PASS AMPLIFIER.